d-Matrix

Phase A — Understand the business

Company Overview

d-Matrix is a Santa Clara AI-inference-silicon startup, founded 2019 by Sid Sheth (CEO) and Sudeep Bhoja (CTO) — both ex-Inphi, the DSP/interconnect company Marvell bought for ~$10B. The company builds a full-stack datacenter inference platform (explicitly not training), sold as PCIe cards + networking + software + a rack reference design, not as a cloud service.

What it actually sells (the product stack):

• Corsair — the flagship inference accelerator card. A PCIe 5.0 x16 card built on TSMC N6, two chips × four chiplets = 8 chiplets, using d-Matrix's Digital In-Memory Compute (DIMC) architecture: SRAM cells repurposed to do the vector-matrix multiplies in place rather than shuttling weights to/from HBMHigh-bandwidth memoryMemory stacked in layers beside a processor so data reaches it faster. The usual bottleneck in AI chips.. 2GB on-die SRAM ("Performance Memory") + 256GB LPDDR5X per card ("Capacity Memory"); 9,600 TOPS at BFP12 / ~2,400 TFLOPs 8-bit; 38 TOPS/W; ~275W @ 800MHz to ~550–600W @ 1.2GHz TDP.
• JetStream — an "industry-first Transparent NIC," full-height PCIe Gen5, 400Gbps, purpose-built to scale inference across servers.
• Aviator — the software stack (the CUDA-analog; see this is the moat problem).
• SquadRack — a disaggregated, air-cooled rack reference architecture co-developed with Arista, Broadcom and Supermicro, runs models up to 100B params in a single 8-node rack, available through Supermicro from Q1'26.

Business model. Hardware unit sales (cards + NICs + racks via OEMs like Supermicro) plus a software/services attach that management wants to grow to a ~$100M ARR pre-IPO milestone. The core pitch to buyers: at rack level, Corsair (increasingly paired with GPUs) delivers ~10× faster token generation, ~3× lower cost, and 3–5× better energy efficiency than GPU-only setups for latency-sensitive workloads.

Customers / channel. Named segments only — "hyperscalers, neoclouds, and frontier AI labs" as priority, plus sovereign/regional clouds and telco/edge. No individual customer names are public (n/a — private, not disclosed). Microsoft is a strategic investor (M12) but has not been disclosed as a Corsair buyer. Channel-to-market is OEM/system-integrator led (Supermicro), with named tech partners Arista + Broadcom (networking) and manufacturing partners TSMC + Alchip.

Suppliers. TSMC (N6 wafers), Alchip Technologies (ASIC design/backend + the 3D-DRAM co-development), LPDDR5X memory suppliers (Samsung Ventures is an investor — a possible supply tell but unconfirmed as a supplier), Broadcom/Arista silicon for the rack fabric.

Supply Chain

Upstream inputs → d-Matrix → end customer, named at every hop (web-only; a private co discloses less than a 10-KForm 10-KA company’s audited annual report to the US regulator. The most complete thing it publishes. would, but the partner set is unusually well-named for a startup):

• Wafer fab: TSMC — N6 for Corsair today; 4nm (N4-class) for the next-gen Raptor part. Single-source foundry = the same Taiwan-concentration chokepoint every fabless AI-silicon name carries.
• Physical design / backend / advanced packaging: Alchip Technologies — not just a vendor but the co-development partner on the world's-first 3D-DRAM ("3DIMC") stack and the Pavehawk test chip. This is a genuine single-source dependency: the 3D-DRAM roadmap is jointly owned, so Alchip is a chokepoint on d-Matrix's answer to its own biggest technical risk.
• Memory: LPDDR5X for capacity memory; the eventual 3D-stacked custom DRAM under the compute die is the differentiator vs the HBM supply chain (SK Hynix/Samsung/Micron) that Nvidia/AMD depend on — d-Matrix's pitch is partly "we route around the HBM bottleneck".
• Rack fabric & networking: Broadcom (switch silicon), Arista (Ethernet systems), plus FabreX PCIe memory fabric + SuperNODE, acquired from GigaIO (April 2026) — d-Matrix now owns its scale-up interconnect IP rather than licensing it.
• System integration / go-to-market: Supermicro (X14 servers, up to 8 Corsair cards/server; sells SquadRack).
• End customers: hyperscalers / neoclouds / frontier labs / sovereign clouds (unnamed).

Chokepoints: (1) TSMC single-source foundry; (2) Alchip on the 3D-DRAM roadmap; (3) advanced-packaging capacity (chiplet + eventual 3D stack) is itself supply-constrained industry-wide. Not exposed to the HBM allocation war — a real, differentiated supply-chain advantage vs GPU vendors, and one of the more defensible lines in the whole thesis.

Competitive Advantages (moats)

The real, durable edges:

1. Architectural differentiation that is hard to copy fast. DIMC (compute-in-SRAM) + a chiplet + a bespoke scale-up fabric is a from-scratch stack, not a GPU with a better scheduler. The IP + the 6+ years of tapeouts (Nighthawk → Jayhawk-I → Jayhawk-II → Corsair → Pavehawk/Raptor) is a genuine head-start.
2. Routing around HBM. If the industry stays HBM-supply-constrained, an inference box that needs no HBM is structurally advantaged on both cost and availability (see Lens 2).
3. A named ecosystem unusually early. Arista + Broadcom + Supermicro + Microsoft(M12) + sovereign-fund capital (Temasek/QIA/EDBI) is a credibility moat — it lowers enterprise adoption risk ("these names vetted it").
4. Owning the scale-up fabric (post-GigaIO). FabreX/SuperNODE lets d-Matrix sell disaggregated rack-scale inference where CPUs/GPUs/accelerators mix — a differentiated posture vs Nvidia's vertically-integrated NVLink rack.

The moat that is NOT yet real — and it is the whole ballgame:

• Software / the CUDA problem. Aviator is years and a developer-army behind CUDA. Every analyst flag on d-Matrix reduces to this: Nvidia doesn't sell chips, it sells a decade of tools every AI engineer already knows; a challenger must make the performance delta so large it overcomes switching cost. d-Matrix's own answer — increasingly positioning Corsair alongside GPUs (speculative decoding, heterogeneous racks) rather than as a rip-and-replace — is a tacit admission the software moat can't be stormed head-on yet.

Bargaining power. Weak-to-neutral today. As a pre-scale buyer of TSMC N6 capacity and packaging, d-Matrix has little leverage on suppliers; against customers it is the unproven insurgent, so it must give value (lower price, engineering support) to win designs. That flips only if a hyperscaler standardizes on it.

Segments

n/a — private, not disclosed. No segment P&L exists (no our figures rows on the research layer; company files nothing). Directionally, revenue is ~100% datacenter inference hardware today, with a software/services line management wants to grow toward ~$100M ARR pre-IPO. Geographically the disclosed push is North America core + EMEA and APAC expansion for sovereign/energy-sensitive buyers, with engineering/support hubs described as spanning multiple continents (India/Australia referenced in third-party profiles, not company-confirmed). Any hard segment split would be fabrication — flagged as not-sourced.

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Phase B — Measure performance

Funding & Valuation Trajectory (+private swap for "Earnings Result")

The round history is the scoreboard for a private:

Total raised: ~$450M over 3 priced rounds, from ~27–28 investors, at a $2B post as of Nov 2025. The Series B→C step-up cannot be computed as a clean multiple (Series B post undisclosed → n/a), but the $44M→$110M→$275M cadence with escalating sovereign-fund participation (Temasek repeat + QIA + EDBI) is the classic pre-IPO capital-stacking signature.

Burn signal (inferred, not disclosed): 283 employees as of Apr 30 2026, a leading-edge TSMC N6 tapeout, a second 4nm tapeout in flight (Raptor), plus a cash acquisition of GigaIO's datacenter business — this is a heavy-burn hardware company. $275M raised Nov 2025 against a from-scratch silicon + software + fabric buildout implies a runwayRunwayHow long the cash lasts at the current rate of spending. It shortens the moment spending rises, which is why a figure taken from a quiet quarter flatters. measured in a small number of years, not many; expect another raise before or into an IPO window (see Lens 11). All burn figures; none disclosed.

The single most important recent "print" isn't a funding round — it's Corsair entering full production on 2026-06-09 with volume shipments to priority customers slated for summer 2026. For a hardware startup, "in volume production" is the equivalent of the first real revenue quarter.

Founder / Product Sentiment Trend (+private swap for "Earnings Calls")

No earnings calls exist; the tape is founder interviews + launch cadence. The arc over ~18 months:

• Nov 2024 (out of stealth): Corsair unveiled; message = "we are the most efficient inference platform; GPUs are overkill for inference" — a confrontational, GPU-replacement framing.
• Aug–Sep 2025 (Hot Chips): message shifts to solving the "memory wall"; 3D-DRAM/3DIMC roadmap (Raptor) unveiled — a tacit concession that the SRAM-only story has a capacity ceiling and the next chip is the real answer for big/reasoning models.
• Nov 2025 (Series C): "Power the Age of AI Inference" — capital-raising, expansionist tone; sovereign/enterprise emphasis.
• Apr 2026 (GigaIO): Sheth: "Inference is bigger than any one chip" — the framing widens from "a better chip" to "the rack/fabric/system for disaggregated inference".
• Jun 2026 (production): "We built Corsair specifically for this moment, the Age of AI Inference" — and, tellingly, the headline demo is now a heterogeneous GPU + Corsair cluster (10× via speculative decoding), i.e. complement GPUs, not replace them.
• Dec 2025 (on the Nvidia-Groq deal): Sheth: "Finally, the market recognizes it… Nvidia has really [said] this approach is a winning approach… there is a whole low-latency inference category… not a GPU-only category".

Sentiment read: consistently high-conviction and increasingly validated by the field — but the substance has migrated from "replace the GPU" → "solve memory" → "own the rack" → "complement the GPU." That migration is either admirable adaptability or a moving goalpost; a skeptic reads it as the pure-play SRAM thesis quietly narrowing as reasoning workloads scaled.

Cap Table & Secondary Marks (+private swap for "Comps")

Syndicate quality — the IPO-proximity tell. d-Matrix's cap table is stacked with exactly the investor types that precede an IPO:

• Strategic: M12 (Microsoft), Samsung Ventures, Ericsson Ventures — strategics de-risk the "does a big buyer believe the tech" question.
• Sovereign / crossover-adjacent: Temasek (repeat, B + C co-lead), Qatar Investment Authority, EDBI (Singapore), Mirae Asset (Korea). Heavy sovereign-wealth participation is a late-stage, IPO-runway signature.
• Notably absent (from public disclosure): the classic US crossover names (Fidelity / T. Rowe / Coatue / Wellington) whose entry is the tightest IPO-imminence signal. Their absence from the disclosed C syndicate is a mild "not-yet-imminent" flag. Secondary marks: n/a — not publicly disclosed.

Mechanism/peer comps (the relevant comparison for a private chip co is architecture + valuation vs the cohort, not P/E):

Valuation multiples (EV/Sales, P/E): n/a (private; no disclosed revenue). The only honest valuation anchor is the $2B Nov-2025 post and the cohort read-throughs above. At $2B on an unaudited pre-scale revenue base, d-Matrix is priced as a credible-contender option, well below Cerebras's public mark and well above SambaNova's distressed Intel number — i.e. the market currently rates it a live, un-broken bet.

Stock-Price Catalysts (mapped to funding/product events — no stock)

No ticker, so "what moves the mark" = the events that reprice a private. Over the company's life, the value-inflection events were: (1) Series A/B/C closes (each a step-up); (2) Corsair unveil, Nov 2024 (stealth → real product); (3) Hot Chips 3D-DRAM/Raptor reveal, Aug 2025 (answered the capacity-ceiling objection with a roadmap); (4) SquadRack + partner ecosystem, late 2025 (Arista/Broadcom/Supermicro credibility); (5) GigaIO acquisition, Apr 2026 (owns the fabric); (6) full production, Jun 2026 (execution proof); and — crucially — (7) an exogenous catalyst: Nvidia's ~$20B Groq deal, Dec 2025, which validated the entire non-GPU low-latency-inference category and, per multiple analysts, sets d-Matrix up for a materially higher next round. Pattern read: the mark reacts to category validation + execution milestones, and the single biggest future re-rate catalyst is a named-hyperscaler design win or a credible S-1.

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Phase C — Judge people & books

Management

• Track record. Strong and relevant. Sid Sheth (CEO) and Sudeep Bhoja (CTO) both come from Inphi, where Sheth built the networking BU into a $1B+ AI-datacenter interconnect business before Marvell's ~$10B acquisition. This is a founding team that has actually built and scaled datacenter silicon and interconnect into a multi-billion outcome — an unusually well-matched pedigree for a fabless inference-fabric play. Prior stops span Broadcom, Intel, NetLogic (Sheth).
• Tenure & skin in the game. Founders since 2019, 6+ years in — long enough to have shipped five silicon generations. Founder equity stakes n/a — not disclosed, but founder-led-since-inception is the archetype.
• Capital-allocation history. Disciplined for the stage: raised in escalating, oversubscribed rounds; the one M&A move (GigaIO's datacenter business) is a coherent, cheap-looking tuck-in that buys the exact scale-up fabric IP the strategy needs rather than an empire-building splurge. No evidence of value destruction. ROIC/ROE n/a (pre-profit).
• Red flags (governance). None public. No related-party disclosures available (private). The one soft flag is promotional benchmarking — persistent "10× faster than Nvidia" headline claims with no MLPerf submission (see Lens 10) is a marketing-vs-verified gap common to the cohort but worth naming.
• Archetype. Repeat operator-founders with a domain-perfect pedigree, not first-timers and not professional caretakers — the right profile for a hard-tech, long-arc silicon company. This is the strongest single pillar of the bull case.

Forensic Red Flags

For a private company there is no income statement / balance sheet / cash-flow statement to forensically dissect — so the standard revenue-recognition/SBC/goodwill checks are n/a — no audited financials filed. What can be assessed is disclosure quality and verification integrity, and here there is one substantive flag:

• No independent benchmark (MLPerf) despite aggressive comparative claims. d-Matrix quotes 9,600 TOPS (BFP12), "10× faster / 3× cheaper / 3–5× more efficient than GPUs," and "30,000 tok/s on Llama-70B at 2ms/token" — but has not submitted to MLPerf or any neutral third-party inference benchmark. The most-cited independent data point (Gimlet Labs: 24s→<2s) is a heterogeneous GPU+Corsair speculative-decoding result, i.e. it measures the pairing, not Corsair standalone. Verify-before-trust: the performance moat is company-marketed, not independently confirmed.
• The "10×" is workload-conditional. Stanford's Rick Bahr (per CNBC) notes the SRAM approach's advantages hold specifically when workloads are small; SRAM "cannot handle massive reasoning models". The headline number is real for the regime it was measured in and quietly narrower elsewhere — an omission-by-framing flag.
• Power spec ambiguity. Public sources cite 275W, 550W and 600W TDP for Corsair at different clocks. Not a red flag per se, but efficiency comparisons ("5× less energy") are sensitive to which operating point is quoted — treat perf/W claims as best-case.

Regulatory findings (from regulatory/regulatory-findings.md, fetched 2026-07-06):

• SEC (EDGAR EFTS — LR + AAER): 0 findings. d-Matrix has no CIK — it is private and not required to file; no EDGAR enforcement search is possible.
• 10-K Item 3 (Legal Proceedings): n/a — no 10-K exists.
• Non-SEC (FTC/DOJ/FDA/CFPB/etc.): web search for "d-Matrix" (FTC OR DOJ OR settlement OR fine OR penalty) enforcement returned no material enforcement, litigation, or consent-decree hits as of 2026-07-06.
• Conclusion: No material regulatory or legal findings — verified via SEC EDGAR EFTS (LR, AAER: 0), web search, and the note that no 10-K exists (private), as of 2026-07-06. Findings are unaudited per public sources.

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Phase D — Project & stress-test

IPO-Readiness & Path-to-Tradeable (+private swap for "Forward Projection")

This is the be-early payoff lens. d-Matrix is not currently in research/private-watch.json — it should be added (see Open items); on the readiness scale (1 early → 5 S-1/IPO-imminent), it sits at roughly 3.5 — late-stage, pre-IPO but not filed.

Milestones that unlock an S-1, and where d-Matrix stands:

1. Product in volume production — ✅ achieved (Corsair full production Jun 2026, volume shipments summer 2026).
2. Named marquee customers / durable revenue — ❌ not yet public. No named hyperscaler design win disclosed; ARR target (~$100M software/services) is a stated goal, not a reported figure. This is the gating item.
3. Next-gen roadmap credibly answering the capacity objection — ⏳ in flight. Raptor (4nm, 3DIMC 3D-stacked DRAM) is slated for a 2026 commercial debut, with the Pavehawk test chip operational and the Alchip 3D-DRAM stack validated. Raptor landing on time is the technical de-risking event for reasoning/agentic workloads.
4. Crossover-fund entry — ❌ not disclosed (Fidelity/T.Rowe/Coatue absent from the public C syndicate).
5. Public-market window open — ✅ demonstrably (Cerebras IPO'd May 2026 at an ~$80B intraday peak; the inference-silicon IPO bid is live).

Estimated window: an S-1 is plausible in the ~12–24 month horizon (call it 2027–2028) if (a) Raptor ships and (b) at least one named large-scale deployment converts — but it is not imminent (no crossover round, no disclosed revenue scale, no filing signal). The nearer-term, more-likely event is a higher-priced private round (Series D at a multiple of the $2B mark), which multiple analysts flagged as probable in the wake of the Nvidia-Groq deal. A strategic acquisition is a real alternative exit — the SambaNova/Intel and Groq/Nvidia precedents show incumbents are buying inference IP; d-Matrix's owned fabric (post-GigaIO) + differentiated DIMC make it an attractive target.

No EPS forecast is logged (our model create skipped) — there is no share count, no revenue base, and no tradeable security to Brier-score. The tracked prediction that would matter is binary and better logged in our position log if/when a position is contemplated: "d-Matrix ships Raptor (3DIMC) commercially before end-2026" and "d-Matrix files an S-1 or is acquired before end-2027."

Bull vs Bear

Bull case. Inference is about to dwarf training — Jensen Huang himself frames eventual inference demand as "a billion times" training, with inference projected at 70–80% of AI compute by ~2035; the inference market is sized at ~$255B by 2030 (~17–19% CAGR). In that world there is room for a specialized, non-GPU, memory-efficient inference platform, and d-Matrix is the cleanest pure-play on it: a domain-perfect founding team (ex-Inphi, $10B outcome), a genuinely differentiated architecture that routes around the HBM bottleneck, a named blue-chip ecosystem (Microsoft, Arista, Broadcom, Supermicro, TSMC, Alchip), sovereign-fund capital runway (Temasek/QIA/EDBI), owned scale-up fabric (GigaIO), and — the kicker — Nvidia just paid ~$20B for Groq, validating the exact "low-latency inference is a distinct category" thesis d-Matrix is built on. If Raptor lands and one hyperscaler standardizes, the next mark is a large multiple of $2B, with an $80B Cerebras public comp overhead as the ceiling-raiser.

Bear case (2–3 permanent-impairment risks).

1. The architecture bet was aimed at the wrong regime at the wrong time. Corsair's SRAM-centric design excels on small/dense ≤100B models — precisely as the frontier pivoted to large, memory-hungry reasoning + agentic workloads. If Raptor/3DIMC slips or underdelivers, the whole platform is optimized for a shrinking slice of demand. This is existential, not cyclical.
2. The CUDA software moat is undefeated. Aviator is a decade behind; d-Matrix's own retreat to "complement the GPU" concedes it can't win rip-and-replace. Inference customers who won't leave the CUDA/vLLM/TensorRT ecosystem cap the TAM d-Matrix can actually address.
3. The category consolidates around Nvidia (and a few incumbents), stranding the independents. Nvidia bought Groq's IP + founder; Intel is circling SambaNova at a distressed $1.6B (down from $5B). The bear read of the same M&A wave that "validated" d-Matrix is that it signals the standalone inference-silicon business is hard enough that even well-funded leaders get absorbed at haircuts — and d-Matrix could be the one that raises at a down-round or sells for less than the last mark. SambaNova is the ghost of this exact company.

Pre-mortem (18 months out, thesis broke): It's early 2028. Raptor shipped a year late and its 3D-DRAM yields disappointed; reasoning models made SRAM-first inference a niche; the one hyperscaler pilot never converted to volume because re-porting off CUDA wasn't worth 3×; a Series D got done at a flat-to-down $2B or the company sold to a strategic for ~$3B — a fine outcome for founders, a mediocre one for the last-round sovereign funds. The "10×" claims aged badly because MLPerf numbers, when finally submitted, showed a real-but-narrower edge.

Multiples too high? n/a on any earnings multiple. On a category-option basis, $2B looks reasonable-to-cheap relative to the $80B Cerebras public comp and the inference TAM — but "cheap vs the euphoria comp" is exactly the trap SambaNova investors fell into at $5B.

Contrarian view (what the market is refusing to see): The consensus post-Groq-deal read is "inference-silicon is validated → d-Matrix's next round is up-and-to-the-right." The thing being under-weighted is that Nvidia validated the category by buying the leader and folding LPU IP into CUDA/NVLink — which makes the independent path harder, not easier. The most likely good outcome for d-Matrix may not be a triumphant IPO but a strategic acquisition into an incumbent that needs its DIMC + fabric — a fine but capped result the current "next unicorn round" framing isn't pricing.

Devil's Advocate (short-seller)

Dismantling the bull case as a skeptical short would:

• Where revenue is concentrated: it isn't — there is no disclosed revenue and no named customer at all. A pre-scale hardware company with zero public marquee logos, valued at $2B, is priced on narrative and syndicate names, not a book of business. If the "priority hyperscalers" are actually a couple of evaluation/POC deployments rather than committed volume, the entire commercial thesis is vapor.
• Why the moat is weaker than bulls think: the only durable technical moat (compute-in-SRAM) is the same feature Stanford's Rick Bahr says can't handle the reasoning models that are eating the market — so the moat and the demand curve are diverging. And the software moat that actually decides chip adoption (CUDA) is one d-Matrix openly can't beat.
• Most dangerous competitor bulls underestimate: not Nvidia (obvious) — it's Etched. A transformer-only ASIC (out of stealth Jun 2026 with >$1B in contracts and ~$800M raised) is even more specialized than d-Matrix and could out-cost-curve it on exactly the fixed-architecture inference workloads d-Matrix targets, while Nvidia+Groq-IP owns the flexible high end. d-Matrix risks being squeezed from both sides.
• Worst capital-allocation / incentive concerns: none egregious, but the persistent unbenchmarked "10× vs Nvidia" marketing with no MLPerf submission is the kind of claim a short builds a "management over-promises" narrative on.
• What must hold for today's $2B: (1) Raptor ships ~on time and actually solves capacity; (2) ≥1 hyperscaler converts POC → volume; (3) the category doesn't fully consolidate into Nvidia/Intel; (4) the next raise is up, not flat/down. Break any one and the mark is at risk.
• If growth disappoints 20–30% (or the roadmap slips a year): for a private option, a Raptor slip or a failed hyperscaler conversion doesn't trim the valuation — it can re-rate it down a tier, SambaNova-style ($5B→$1.6B is a 68% haircut precedent that already happened to a peer).
• Single scenario that permanently impairs the business: Raptor's 3D-DRAM stack fails to yield or is late while reasoning/agentic inference becomes the dominant workload — leaving d-Matrix with a production chip optimized for a shrinking niche and a software stack no one will re-platform onto. Plausibility: moderate and rising — it is the central risk, not a tail.

Management Questions (ordered by information value)

1. Name a committed, volume (not POC) customer and the deployed rack count — or, if you can't for confidentiality, give the % of revenue under signed volume commitment vs evaluation. (This single answer would most change the view.)
2. What is current ARR / run-rate revenue, and how much is hardware vs the ~$100M software/services target?
3. Raptor: exact commercial-ship date, current yield on the Alchip 3D-DRAM stack, and what parameter/context regime it targets that Corsair cannot.
4. On reasoning/agentic models with large KV-caches — what is Corsair's honest competitive position today, standalone, vs a B200/GB200 rack?
5. Why no MLPerf (or any neutral third-party) submission? When will there be one, and on which workloads?
6. Of the "10× / 3× / 5×" figures — which are standalone-Corsair and which require the heterogeneous GPU+Corsair pairing?
7. What is the realistic path to displacing CUDA in a customer's stack — how many engineer-weeks does porting take, and who bears that cost?
8. Cash runway at current burn post-Series C, and do you expect to need a Series D before an S-1?
9. Would you take a strategic-acquisition offer, and at what kind of premium to the last round — how do you weigh IPO vs sale?
10. How exposed are you to TSMC N6/N4 allocation and advanced-packaging capacity, and what is the second-source plan?
11. Is Alchip a single point of failure on the 3D-DRAM roadmap, and do you own the resulting IP outright?
12. What did GigaIO's FabreX/SuperNODE actually cost, and what revenue/margin does the systems business add vs the card business?
13. How do you defend against Etched-style transformer-only ASICs undercutting your cost curve on fixed workloads?
14. Which named strategic (Microsoft/Samsung/Ericsson) is closest to a commercial — not just financial — relationship?
15. What is the gross-margin profile of a Corsair card / SquadRack at volume, and how does it compare to a GPU vendor's inference margin?

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