SK Hynix

Type: Organization (memory manufacturer)

One of the three DRAM suppliers, and on this rung the one that has published a serving-layer design rather than a capacity roadmap. StreamDQ places DeQuantization Blocks on the HBM base die, so quantized weights are unpacked on the memory side during ordinary loads and never consume GPU CUDA cores for dequantization.

The architectural claim is that dequantization is misplaced. Weight-only quantization saves memory traffic but pays for it in compute on the host; moving the unpack into the memory stack keeps the traffic saving without the compute cost.

Key contributions

• Up to 7.08x GEMM speedup by eliminating host-side dequantization (StreamDQ)
• 90.23% lower energy on the affected path (StreamDQ)
• 54.68% end-to-end LLM latency reduction (StreamDQ)
• Ties the serving rung to a named product roadmap — C-HBM4E — rather than a research artifact (StreamDQ)

Why this sits on serving and not hardware

The hardware rung owns the memory-wall thesis and the supply picture. StreamDQ is filed here because the mechanism it changes is a serving-time one: what happens to a quantized weight on its way to a matmul, per token. The part number belongs to hardware; the dequantization path belongs here.

Mentioned in

• Low-Bit Quantization — moves the unpack off the host
• Frontier — cited under the memory-centric turn, as vendor-measured and not yet shipping