Hardware & Computing

AI compute infrastructure in early 2026 is defined by two simultaneous paradigm shifts. On the classical side, the unit of compute is no longer the GPU chip but the rack — NVIDIA's Vera Rubin (50 PFLOPS FP4 per GPU, 288 GB HBM4 at 22 TB/s, 72-GPU racks at 260 TB/s aggregate) set the new ceiling. The foundry substrate shifted beneath it: TSMC N2 (2nm) in mass production Q4 2025, A16 (1.6nm) with backside-power Super Power Rail due late 2026 for NVIDIA's Feynman. HBM memory underwent an architectural shakeup — base dies moved from DRAM to TSMC logic processes, enabling HBM4E (2.5× bandwidth) and C-HBM4E (near-memory compute). On the commercial photonic side, 2026 is the year photonic computing became a production substrate: three anchor results — imec's PyTorch-integrated tensor processor (Nature Communications), Nokia Bell Labs' first on-chip photonic backprop (Nature), and Lightmatter's transformer-without-modification demo — prove photonic compute is no longer a research curiosity.

On the quantum side, four anchor results now define the landscape. Google Willow (Aug 2024) crossed below the surface-code threshold — exponential error suppression with Λ=2.14 per 2 distance steps, distance-7 code at 0.143% error/cycle. IBM Nighthawk + qLDPC (Nov 2025) delivered real-time error decoding in <480ns alongside a 120-qubit superconducting chip, with a concrete 2029 fault-tolerance target. Quantinuum's iceberg codes (March 2026) crossed beyond break-even with 94 logical qubits from only 98 physical. Besedin et al. in Nature Physics (Jan 2026) demonstrated the first lattice surgery on superconducting qubits — the compute primitive on surface codes. And in April 2026, Google expanded into neutral-atom quantum via QuEra, making neutral atoms a formal third architecture alongside superconducting and trapped-ion. 100,000-atom chambers are the scaling target.

The custom-silicon insurgency continues (hyperscaler ASICs at 44.6% CAGR vs GPU at 16.1%) but NVIDIA's rack-as-product lock-in is proving more durable than chip-level CUDA lock-in.

Frontier — What's Moving Now

• Quantum: three architectures, same 2029 target — superconducting (IBM + Google), trapped-ion (Quantinuum), neutral atom (QuEra/Atom/Pasqal).
• Below-threshold surface codes proven — Google Willow, Λ=2.14, 0.143% error/cycle at distance-7.
• Lattice surgery on superconducting — Besedin et al. Nature Physics Jan 2026, first on SC hardware.
• Neutral atom as third architecture — Google + QuEra (Apr 2026), Microsoft + Atom Computing, Pasqal.
• Photonic compute crossed to production — 3 anchor results in 2025-2026 (imec, Nokia Bell Labs, Lightmatter).
• TSMC Angstrom era — N2 in volume, A16 late 2026, first Nanosheet GAA node.
• HBM4E / C-HBM4E architectural shakeup — base dies on TSMC N3P, 2.5× bandwidth, near-memory compute.
• Memory-centric computing / PIM — 60–90% of system energy is data movement; C-HBM4E NMC is the commercial wedge; RowHammer/RowPress force memory intelligence; JEDEC + trillion-dollar incumbency is the real bottleneck.
• IBM verified quantum advantage target — end-2026.

Concept Map

Concepts

Entities

Timeline

See timeline.md for chronological developments.

Research Frontier

See frontier.md for active research directions, breakthroughs, and knowledge gaps.

Sources