Research Frontier: Optical Computing

What's genuinely new and where the field is heading.

Active Frontiers

1. Photonic Tensor Cores

Status: Rapid progress Key sources: Neuromorphic Photonic Computing Key players: Research labs (Advanced Materials community)

The projected metrics — 880 TOPS/mm^2 compute density, 5.1 TOPS/W energy efficiency — represent a potential paradigm shift for AI acceleration. Phase-change materials enabling non-volatile photonic weight storage bring the field closer to practical in-memory-computing. The gap between lab demonstrations and production systems remains large, but the theoretical ceiling is high enough to justify serious investment.

Open problems:

• Bit precision achievable with analog photonic weights
• PCM write endurance (cycle count before degradation)
• Fabrication yield at wafer scale
• Thermal management at scale despite low computational heat

2. Co-Packaged Optics for AI

Status: Rapid progress — UCIe standardization reached Key sources: Lightmatter Passage L200, Ayar Labs UCIe Chiplet, Photonics Shift Key players: Lightmatter, Ayar Labs, Broadcom, NVIDIA, TSMC

The most immediately commercial frontier, now with two major milestones. Lightmatter's 1.6 Tbps/fiber record and Ayar Labs' first UCIe-compliant optical chiplet (8 Tbps, SuperNova 16-wavelength) represent complementary advances — record bandwidth and industry standardization. Ayar Labs' TSMC COUPE partnership makes optical I/O accessible to any TSMC customer. Nvidia backing both Lightmatter and Ayar Labs with strategic investment signals strong market conviction.

The deployment timeline is crystallizing: early CPO adopters in 2026 AI training clusters, broader 800G/1.6T adoption in 2027, photonic interconnects standard for AI-scale networking by 2028. Manufacturing readiness (yield, InP supply, workforce) rather than physics is the real constraint.

Open problems:

• Cost premium vs. pluggable optics at scale
• Integration yield (combining optical and electronic fabrication)
• InP laser supply chain constraints
• Photonic component yield rates below semiconductor norms
• Standardization across vendors (CW-WDM, CPO interfaces)

3. On-Chip Nonlinearity

Status: Steady progress Key sources: Integrated Platforms for Photonic NN Key players: Research community

The bottleneck that limits photonic computing's full potential. Current photonic neural networks require optical-electrical-optical (O-E-O) conversion for nonlinear activation functions. All-optical nonlinearities using saturable absorbers and phase-change materials show promise but remain immature.

Open problems:

• Saturable absorber reliability and tunability
• Energy cost of all-optical nonlinearities
• Integration with existing MZI/MRR architectures
• Whether hybrid optical-electronic remains optimal long-term

Recent Breakthroughs

Predictions & Trends

• UCIe optical standardization accelerates adoption: Ayar Labs + TSMC COUPE means any chip designer can integrate optical I/O
• CPO adoption accelerates: The AI training bandwidth wall is the most urgent infrastructure problem; photonic interconnects are the most mature solution
• 2026-2028 is the critical transition window: Early deployments will validate or delay the photonic future
• Photonic compute remains 3-5 years from production: Despite impressive projections, fab-yield and nonlinearity challenges keep photonic tensor cores in research phase
• Hybrid architectures likely dominate: Optical data movement + optical linear algebra + electronic nonlinearities
• Manufacturing is the real bottleneck: Not the physics, but yield, supply chain, and workforce

Knowledge Gaps

Areas where the KB needs more sources:

• Intel/TSMC silicon photonics �� suggested search: "Intel silicon photonics foundry 2026"
• Luminous Computing — suggested search: "Luminous Computing photonic AI chip 2026"
• Photonic quantum computing — suggested search: "photonic quantum computing PsiQuantum Xanadu 2026"
• Optical networking standards — suggested search: "co-packaged optics OIF standard 2026"