First UCIe optical chiplet. 16-wavelength SuperNova, 8 Tbps. TSMC COUPE partnership. $500M raise Mar 2026 (Nvidia-backed). Production samples 2026.
Ayar Labs UCIe Optical Chiplet
- Source: https://ayarlabs.com/news/ayar-labs-unveils-worlds-first-ucie-optical-chiplet-for-ai-scale-up-architectures/
- Type: technical-report
- Institution: Ayar Labs
- Date Ingested: 2026-04-05T20:00:00Z
- Tags: optical-chiplet, ucie, ayar-labs, co-packaged-optics, nvidia
Key Contribution
First UCIe-compliant optical chiplet. 16-wavelength SuperNova light source achieving 8 Tbps bandwidth. TSMC COUPE partnership for co-packaged optics. $500M funding raise in March 2026 (Nvidia-backed). Production samples targeted for 2026.
Summary
Ayar Labs has unveiled the world's first optical chiplet compliant with the Universal Chiplet Interconnect Express (UCIe) standard, enabling optical I/O to be integrated directly into multi-die chip packages alongside compute chiplets.
SuperNova Light Source
- Wavelengths: 16 wavelengths — wavelength-division multiplexing (WDM) for maximum bandwidth density
- Bandwidth: 8 Tbps total aggregate bandwidth
- Integration: Designed for co-packaging with compute dies (GPUs, AI accelerators)
- Standard compliance: UCIe — the emerging industry standard for chiplet-to-chiplet interconnect
TSMC COUPE Partnership
- COUPE: TSMC's Compact Universal Photonic Engine platform
- Integration: Enables Ayar Labs optical chiplets to be co-packaged with TSMC-fabricated compute dies
- Manufacturing: Leverages TSMC's advanced packaging capabilities (CoWoS, InFO)
- Ecosystem: Makes optical I/O accessible to any chip designer using TSMC
Funding and Commercialization
- $500M raise: March 2026 funding round
- Nvidia backing: Strategic investment from the dominant AI chip company
- Production samples: Targeted for 2026
- Market focus: AI scale-up architectures where bandwidth between chips is the bottleneck
Why UCIe Matters
- UCIe is the industry standard for connecting chiplets within a package
- Optical UCIe replaces electrical interconnects with photonic links
- Eliminates bandwidth-distance tradeoff of copper traces
- Enables disaggregated chip architectures where memory, compute, and I/O chiplets communicate optically
Significance
This is a landmark moment for co-packaged optics: the first time optical I/O has been standardized into the chiplet ecosystem via UCIe. Nvidia's backing signals that the dominant AI hardware company sees optical interconnect as essential for next-generation AI systems. At 8 Tbps, the SuperNova enables bandwidth densities that electrical interconnects cannot match at equivalent power consumption. The TSMC COUPE partnership means this technology can be adopted by the broader semiconductor industry, not just Ayar Labs' direct customers. Production samples in 2026 put this on track for data center deployment by 2027-2028.