TSMC

company
semiconductortsmcfoundry2nma16gaa-transistorpackagingcowos

Company dossier

TSMC — the primary-source profile

TSMC

Type: Company (Semiconductor foundry, Hsinchu, Taiwan) Full name: Taiwan Semiconductor Manufacturing Company

TSMC is the substrate company. Every advanced AI chip — NVIDIA Rubin, Apple A20, hyperscaler custom ASICs — runs through TSMC's process nodes and CoWoS packaging. N2 (2nm) entered mass production Q4 2025 with 65–75% yield and Apple taking over 50% of initial capacity. A16 (1.6nm) with Super Power Rail targets late 2026 volume production and is NVIDIA's Feynman node. Meanwhile TSMC's logic processes (12FFC, N5, N3P) are the new home for HBM base dies — memory is becoming a logic product.

Key Contributions

  • N2 mass production Q4 2025 — first Nanosheet GAA node in volume. (TSMC Angstrom Era)
  • 65–75% N2 yield — ahead of Samsung and Intel. (TSMC Angstrom Era)
  • A16 (1.6nm) with Super Power Rail, late 2026 — backside power delivery. (TSMC Angstrom Era)
  • CoWoS-L packaging — enables HBM4/HBM4E integration with 2nm logic. (TSMC Angstrom Era)
  • HBM4 base dies on TSMC 12FFC / N5 / N3P — "memory becomes a logic product." (HBM4 Shakeup)

Key Customers

CustomerProductNode
AppleA20 (iPhone 18)N2
NVIDIARubin (current), Feynman (next)N3P / A16
Microsoft, Alphabet, Meta, Amazon, OpenAICustom AI ASICs via Broadcom (~60%) / Marvell (~35%)3nm / 2nm / A16

Every hyperscaler ASIC fabs at TSMC: Google Ironwood, AWS Trainium3 (first AWS 3nm part), Microsoft Maia 200 (3nm class), Meta MTIA, OpenAI Titan — all routed through Broadcom or Marvell co-design but manufactured on TSMC nodes. TSMC is therefore the substrate beneath both sides of the GPU-vs-ASIC fight (Custom AI ASIC state of play).

Financials — Q2 2026 earnings print (most recent primary)

The Q2 2026 print (reported 2026-07-16) resolved the margin question the June monthly 6-K left open. All figures below are primary — from TSMC's own 2Q26 Earnings Release + Quarterly Management Report (Q2'26 earnings).

MetricQ2'26 actualQ2'26 guidedResult
Gross margin67.7%65.5–67.5%+0.2pp above ceiling (+1.5pp QoQ)
Operating margin60.3%56.5–58.5%+1.8pp above ceiling
RevenueUS$40.20B / NT$1,270.38B$39.0–40.2Btop of band; +36.0% YoY (NT$)
Net incomeNT$706.56B+77.4% YoY (incl. one-off, below)
Net profit margin55.6%vs 50.5% (1Q26), 42.7% (2Q25)
Diluted EPSNT$27.25 (US$4.31/ADR)+77.4% YoY
Q2 capexUS$15.70B (H1 US$26.80B)tracking high end of $52–56B FY guide
  • Margin cleared its guided ceiling with both dilution drags already active. Management guided FY26 GM to face 2–3pt of N2-ramp + 2–4pt of overseas-fab dilution; the MR confirms overseas dilution is in this quarter's GM and days-of-inventory rose 7 (to 87) on the N2 ramp, with 2nm at 3% of wafer revenue — yet GM still rose +1.5pp QoQ through the top of the guide. The cost/utilization lever is currently outrunning the dilution lever (mechanical statement; the pricing-power read is left open). Evidence: strong (primary)
  • Headline net income is flattered by a one-off. The record NT$706.56B (+77.4% YoY) includes a NT$63.20B disposal/mark-to-market gain on VIS shares; stripping it, net income ≈ NT$643B (≈+62% YoY). The operating story is clean — GM 67.7%, OpM 60.3%, operating income NT$766.60B (+65.4% YoY) are untouched by the VIS gain. Evidence: strong (primary)
  • HPC mix, primary: HPC reached 66% of revenue (2Q25 60% → 1Q26 61% → 2Q26 66%), +20% QoQ — the biggest platform mover — while Smartphone fell to 22%. Advanced nodes (≤7nm) were 77% of wafer revenue. Evidence: strong (primary)
  • Q3'26 guidance (primary): revenue US$44.6–45.8B; GM 65–67%; OpM 56–58%; FX 1 USD = 32 NTD. The Q3 GM guide sits below the Q2 actual — consistent with a steeper H2 N2 ramp.
  • Prior monthly print (superseded as the margin anchor, kept for the top-line series): June 2026 revenue NT$442.68B (+67.9% YoY); H1 2026 revenue NT$2,404.48B (+35.6% YoY), Form 6-K filed 2026-07-13. (TSMC 6-K, Jun 2026)
  • Attributed (call/slide-resident, not primary): FY26 capex high-end reaffirmed + >30% USD growth; CoWoS sold out through 2027 (carried, not re-verified); TSMC reportedly pushing back on ASML's pricing plan ([The Information via FinancialJuice]).

Advanced Packaging — the capacity TSMC controls

TSMC is not only the logic substrate; it owns the interposer step that gates AI accelerator supply. Full treatment on Advanced Packaging & CoWoS Capacity.

PeriodCoWoS capacity (wafers/month)
Late 2024~35,000
End 2025~75,000
End 2026 (target)120,000–130,000
  • Named sites: AP6 (Zhunan), AP7 (Chiayi) — positioned as the largest AP hub, AP8 (Tainan), plus an announced Arizona advanced-packaging fab.
  • NVIDIA reported to hold ~60% of CoWoS capacity through the expansion; CoWoS-L/S reported fully booked through 2026 with OSAT overflow to ASE (CoWoP).
  • Evidence caveat: the ramp figures and the ~60% allocation are secondary/summary-derived — the ingest note on the capacity source records that WebFetch was blocked and the content came from a search snippet. The 2026 figure is a target, unverified against realized output. The "CoWoS sold out through 2027" line remains call-resident and attributed, not primary. The capex funding the expansion is primary: H1'26 capex US$26.80B against a $52–56B FY guide.

Risks & Constraints

  • Geopolitical concentration in Taiwan (Arizona fab expansion only partial mitigation).
  • A16 wafer cost ($45–50k each) bifurcates the market.
  • CoWoS packaging bottleneck — TSMC committed $56B capex to double CoWoS for Rubin-era demand.
  • Announced-vs-realized packaging capacity is unverified; the 130K/mo end-2026 figure is a plan.

Mentioned In

Related Entities

  • SK Hynix — stacks HBM onto base dies TSMC fabricates; the second capacity gate
  • NVIDIA — reported to hold ~60% of CoWoS allocation

Changelog

  • 2026-07-22 — Added the advanced-packaging capacity section (CoWoS 35K→75K→130K target, AP6/AP7/AP8 + Arizona, ~60% NVIDIA allocation) with its secondary/summary-derived provenance stated explicitly and the end-2026 number marked as a target rather than a realized figure. Cross-linked to the new packaging concept page and the SK Hynix entity. +1 source.

  • 2026-07-16 — Folded in the Q2 2026 earnings print (reported 2026-07-16, all primary from TSMC's own IR docs): GM 67.7% above the 65.5–67.5% guided ceiling, OpM 60.3%, revenue US$40.20B/NT$1,270.38B at the top of guidance, HPC 66% (60→61→66 progression), Q2 capex US$15.70B / H1 US$26.80B, 2nm 3% of wafer revenue with N2-ramp + overseas dilution demonstrably active yet GM still expanding; VIS NT$63.20B one-off caveat on the headline net income; Q3 guide $44.6–45.8B / GM 65–67%. Superseded the monthly 6-K as the margin anchor (top-line series kept). No directional call.

  • 2026-07-14 — Added June 2026 / H1 2026 monthly-revenue print (Form 6-K, filed 2026-07-13): NT$442.68B June revenue (+67.9% YoY), NT$2,404.48B H1 revenue (+35.6% YoY). Revenue-only filing — no margin data yet.

  • 2026-06-24 — Expanded the Key Customers table to cover all hyperscaler ASIC programs (added Amazon, OpenAI) routed via Broadcom ~60% / Marvell ~35% co-design, all on TSMC nodes — TSMC as the substrate beneath both GPU and ASIC.

  • 2026-04-17 — Added A16 / HBM-base-die / CoWoS detail.