Optical Computing — Timeline

Timeline

Newest-first.

2019-2023 — [Research] Silicon photonics matures as a CMOS-compatible platform. Major foundries (GlobalFoundries, TSMC) offer photonic PDKs, enabling fabless photonic chip design. (Context: Photonic Neural Networks)
2021 — [Industry] Lightmatter founded and begins developing Passage photonic interconnects and Envise photonic compute chips. (Context: Lightmatter)

2024 — [Industry] Co-packaged optics gains momentum as NVIDIA, Broadcom, and startups announce CPO roadmaps for next-generation AI networking. (Context: Photonic Interconnects)
2024 — [Research] Phase-change material integration in photonic waveguides advances, enabling non-volatile photonic weight storage for neuromorphic computing. (Context: Photonic Tensor Cores)

Nov 19 — [Technical Report] Q.ANT NPU 2 second-gen photonic processor: 30x lower energy, 50x higher performance (vendor claim), shipping early 2026. (Q.ANT NPU 2)

Oct — [Technical Report] First fully integrated TSMC COUPE-based optical I/O engine (Alchip + Ayar Labs demo): 100 Tb/s per accelerator via UCIe. (TSMC COUPE)

Sep 1 — [Paper] Photonic neuromorphic computing review (Xiang et al.) — device → architecture → chip → algorithm framework. (Integrated Photonic Neuromorphic Computing Review)

Aug 19 — [Paper] SJTU / TuringQ 498-component programmable photonic processor: 100% NP-complete + 97% MNIST on the same hardware, 7.22-bit precision, no hardware modification. (Fully-Programmable Photonic Processor)

Jun 1 — [Paper] Advanced Materials publishes neuromorphic photonic computing review — projects 880 TOPS/mm^2 and 5.1 TOPS/W for photonic tensor cores, 1-3 OOM over digital accelerators. (Neuromorphic Photonic Computing)
Jun — [Paper] 16,000+ component photonic accelerator benchmarks faster than a commercial GPU on specific workloads (Nature) — largest-scale photonic accelerator demonstrated. (Large-Scale Photonic Accelerator)
Jun 4 — [Paper] Quantum photonics on a chip review (Katiyi & Karabchevsky): SNSPDs >90%, quantum dots β≈98%, silicon photonics the preferred QKD platform. (Quantum Photonics on a Chip)

Mar 31 — [Technical Report] Lightmatter unveils Passage M1000 photonic superchip — 114 Tbps total optical bandwidth, 256 fibers, >4,000 mm² 3D active photonic interposer with world-first on-package solid-state optical circuit switching (GF Fotonix + Amkor). Re-surfaced as a flagship at Computex 2026. (Lightmatter Passage M1000)
Mar 1 — [Paper] npj Nanophotonics publishes comprehensive review of integrated platforms for photonic neural networks — MZI meshes, MRR arrays, and hybrid architectures. (Integrated Platforms for Photonic NN)

Apr 12 — [Paper] SimPhony cross-layer benchmarking (UT Austin / ASU). First rigorous system-level accounting of photonic AI: DAC/ADC conversion dominates the energy budget, MZI meshes fail on Transformers, time-multiplexed crossbar is the competitive architecture, ~8-bit precision ceiling. (Harnessing Photonics)
Apr 2 — [Preprint] Fully-photonic CNN with no O/E/O conversions (Ranjan, Thakral, Sehgal; arXiv 2604.02429). 94% MNIST on 2,132 on-chip parameters; digital-twin + in-situ SPSA training; designed to sidestep the DAC/ADC bottleneck. (Photonic CNN Pre-trained In-Situ)
Apr 1 — [Preprint] LightIn versatile silicon photonic processor (arXiv 2504.01463). 160 components on a single CMOS-compatible chip realize compute + signal processing + switching + encryption. (LightIn)

Mar — [Paper] Nokia Bell Labs demonstrates the first on-chip gradient-descent backpropagation for an integrated photonic deep NN — all linear and nonlinear computation on a single chip, training robust to fabrication variation (>90% accuracy). Nature 651, 927-932. Retires the "photonic chips are inference-only" assumption. (On-Chip Backprop PNN)
Mar — [Paper] University of Sydney inverse-designed nanophotonic accelerator published in Nature Communications (Sved et al.): ~400M trainable parameters/mm² via subwavelength voxels; ~89% MNIST / ~90% MedNIST on-chip (90-99% on 10K+ biomedical images), picosecond/speed-of-light. Peer-reviewed upgrade of the March news report. (Inverse-Designed Nanophotonic NN)
Mar 11 — [Technical Report] Lightmatter announces Passage L200 with record 1.6 Tbps per fiber and 200+ Tbps per package. Qualcomm partnership announced. (Lightmatter Passage L200)
Mar 9 — [News→Paper] University of Sydney ultra-compact photonic AI chip first reported (TechXplore); later published in Nature Communications. (Nanophotonic Neural Network Sydney)
Mar — [Technical Report] Ayar Labs unveils world's first UCIe-compliant optical chiplet. SuperNova 16-wavelength light source at 8 Tbps. TSMC COUPE partnership for co-packaged optics. $500M funding raise (Nvidia-backed). Production samples targeted 2026. (Ayar Labs UCIe Chiplet)

Feb 26 — [Preprint] SKYLIGHT: hundred-channel 3D photonic in-memory tensor core (arXiv 2602.19031). 3D + WDM + non-volatile photonic memory co-designed for real-time AI inference. (SKYLIGHT)
Feb 5 — [Analysis] Siemens EDA "Five Key Trends of CPO in 2026": link power 30W→9W, UCIe optical extends package boundaries, thermal management the critical blocker. (CPO Five Trends)

Jan 26 — [Technical Report] Lightmatter and GUC partner to produce commercial Passage 3D CPO for AI hyperscalers — pairs Lightmatter's 3D-stacked silicon photonics engine with GUC's ASIC design + advanced packaging, extending cluster scale-up across multiple racks. (Lightmatter–GUC Partnership)

2026 — [Analysis] Industry analysis projects photonics deployment timeline for AI data centers: early CPO adopters 2026, broader 800G/1.6T adoption 2027, photonic interconnects standard for AI networking by 2028. Manufacturing readiness (yield, InP supply) is the real constraint. (Photonics Shift)