Broadcom

Type: Company (Semiconductor / custom-ASIC co-design + networking, Palo Alto, CA) Ticker: AVGO

Broadcom is the dominant merchant co-design partner for hyperscaler AI ASICs — the company hyperscalers hire to turn an in-house architecture into a manufacturable chip (SerDes, packaging, IP integration, tape-out). As of mid-2026 it holds an estimated ~60% of the custom-AI-ASIC design market, anchoring Google's TPU, Meta's MTIA, Microsoft's Maia, and OpenAI's "Titan" program. This makes Broadcom a structural winner of the GPU-vs-ASIC shift: it captures custom-silicon value regardless of which hyperscaler's chip prevails.

Broadcom is also directly inside the demand story — Anthropic's April-2026 multi-gigawatt (~5 GW, from 2027) next-generation TPU expansion was struck jointly with Google and Broadcom, signalling Broadcom's role extends from chip design into the capacity commitments themselves.

Key Contributions

• ~60% of the custom-AI-ASIC co-design market — TPU, MTIA, Maia, OpenAI Titan. Evidence: moderate (summary-derived) (Custom AI ASIC state of play)
• Google/Broadcom/Anthropic ~5 GW TPU expansion (2027) — co-party to the next-gen capacity deal. Evidence: moderate (multi-source) (Anthropic)
• Networking franchise (Tomahawk / Jericho switch silicon) complements the ASIC business — relevant to rack-scale scale-out fabrics.

Risks & Constraints

• Concentration risk — a handful of hyperscaler customers drive the ASIC book.
• Competes with Marvell (~35%) for co-design wins; share estimates vary by analyst.
• Dependent on TSMC capacity (nodes + CoWoS) like every other AI-silicon player.

Mentioned In

• Custom Silicon vs GPU — the merchant co-design duopoly (Broadcom / Marvell)
• TSMC — hyperscaler ASICs route through Broadcom but fab at TSMC

Changelog

• 2026-06-24 — Entity created. Broadcom as the ~60% custom-AI-ASIC co-design leader (TPU/MTIA/Maia/Titan) and co-party to the Anthropic ~5 GW 2027 TPU expansion.