TSMC Delays Use of ASML's High-NA EUV Machines Over Cost Concerns
TSMC publicly defers high-NA EUV adoption until at least 2029, citing ~$400M per-machine cost (vs ~$200M for current EUV). Plans to squeeze more performance from existing EUV through process optimization (A13, N2U) — major signal for ASML revenue
TSMC Delays Use of ASML's High-NA EUV Machines Over Cost Concerns
Abstract
TSMC Deputy Co-Chief Operating Officer Kevin Zhang told reporters at the 2026 NA Tech Symposium that the world's largest foundry has no current plans to adopt ASML's high-numerical-aperture (high-NA) extreme-ultraviolet lithography machines. The machines fetch upwards of €350 million (~$410 million) apiece — roughly double the cost of the older EUV generation. TSMC will instead "squeeze more gains" from its existing EUV fleet through node optimization (A13, N2U) until at least the late 2020s.
Key Contributions
- Headline: TSMC publicly delays high-NA EUV adoption — a major customer signal for ASML's most important new product line.
- Cost framing: ~$400M per high-NA tool vs ~$200M for current-gen EUV.
- Strategy: TSMC will rely on process tricks (A13 = direct shrink of A14, N2U = cost-down variant) and continued EUV optimization rather than buy the new tooling.
- Implications for ASML: materially negative read-through to ASML high-NA bookings through 2028. Intel and Samsung remain the near-term high-NA customers but volumes are far lower than TSMC.
- Implications for the litho roadmap: TSMC's bet is that computational lithography (NVIDIA cuLitho, see related source) + multi-patterning extensions will keep current EUV competitive — buying time before an unavoidable high-NA transition closer to 2029 (A13 era).
Results
- TSMC has stated it can produce A13 (its first ~1.3nm node) without high-NA EUV.
- ASML's high-NA business is materially reliant on Intel and Samsung in the near term.
- TSMC is effectively saying: at $400M/tool, the ROI math doesn't yet favor adoption versus optimizing what they already have.
Limitations
- TSMC's position could shift quickly if competitors (Intel 18A, Samsung GAA) leverage high-NA into a process advantage.
- "No current plans" is not "never" — adoption likely simply pushed out to 2029+.
- Cost figures vary across sources ($350M–$410M per tool).
Full Content
The signal here is economic, not technical. ASML has spent a decade and >$10B developing high-NA EUV, with TSMC long assumed to be the anchor customer for the rollout. Zhang's comments represent the first time TSMC has publicly stated it will defer adoption. The reasoning is straightforward foundry economics: a $400M tool with limited throughput must be amortized over a node generation that delivers a clear performance/density advantage TSMC's competitors can't match through cheaper means. With computational lithography (e.g., NVIDIA's cuLitho, deployed in collaboration with TSMC and Synopsys) accelerating mask design, and with TSMC's process engineers extracting more out of standard EUV, the immediate productivity case for high-NA narrows.
This has implications across the supply chain:
- ASML revenue: high-NA bookings will be slower than the bull case assumed. Expect Intel + Samsung as the near-term anchor customers.
- Foundry competition: Intel 18A's pivot to high-NA EUV (already deployed at D1X in Hillsboro) is now a more important competitive variable — if Intel's high-NA-enabled performance leadership materializes, TSMC's "squeeze the existing EUV" thesis comes under pressure.
- Computational lithography: cuLitho-style GPU-accelerated mask synthesis becomes more economically critical, since it lets standard EUV approximate higher-resolution patterning.
- TSMC capex mix: more spend on advanced packaging (Arizona fab announced same week) and less on next-gen litho.
The deferral is also consistent with TSMC's historical pattern: rarely the first to adopt a new lithography generation, preferring to wait until the cost/yield economics favor mass adoption.
Source: Bloomberg coverage of TSMC NA Tech Symposium 2026, April 22, 2026